
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
111
Revision 1.6
Reset Timing
The KSZ8873MLL/FLL/RLL reset timing requirement is summarized in Figure 31 and Table 32.
Figure 31. Reset Timing
Table 32. Reset Timing Parameters
Symbols
Parameters
Min.
Max.
Units
tSR
Stable Supply Voltages to Reset High
10
ms
tCS
Configuration Setup Time
50
ns
tOH
Configuration Hold Time
50
ns
tRC
Reset to Strap-In Pin Output
50
s
tVR
3.3V Rise Time
100
s
Note:
After the de-assertion of reset, it is recommended to wait a minimum of 100s before starting programming on the managed interface (I
2C slave, SPI
slave, SMI, MIIM).